Reconfigurable Logic Circuits for Intelligent Human Sensing

This paper presents the concept of the reconfigurable preprocessors for intelligent human sensing. Reconfigur-able logic can realize high-performance preprocessing of sensor data with flexibility and low power consumption. It is well known that the custom circuit for a specific application can accelerate the execution of that application. However, custom circuits were not so widely accepted, because it was difficult to design and manufacture them. Now, recent developments in EDA (Electronic Design Automation) tools have broken the potential barriers to the design of custom circuits. The only problem left is manufacturing them. A usual LSI device has its function fixed when it is manufactured, and hundreds of the same devices are manufactured together, as is the nature of LSI technology. This means that we have to fabricate hundreds of custom LSI device for a fixed application, which drives up the cost of the device to a prohibitive level. A reconfigurable logic device is a kind of LSI that can change its logic function (configuration) at run-time. Using reconfigurable devices, we can implement any custom circuit regardless of quantity. Field Programmable Gate Array (FPGA) is a kind of reconfigurable logic device. The advances in FPGA technology have been truly amazing in these last 10 years, so that today we can purchase an FPGA device with 1—10 million gates at a reasonable price. They are no longer only for researchers but also widely used in the industrial world. In this study, the author investigates the possibilities of applying reconfigurable logic technology to intelligent human sensing. Figure 1 illustrates the concept of reconfigurable sensor preprocessors. Huge numbers of sensors are involved in the intelligent human sensing system. These sensors continuously yield enormous amounts of data that must be processed without delay since it is both impossible and futile to record it all. As these data are generated by sensor hardware, their format is relatively simple and fixed. Custom hardware is well suited to process such large amounts of simple data rapidly, whereas it is impractical to handle them by microprocessors that are intrinsically sequential and weak in bulk data transfer. Even the recent high-performance microprocessors cannot escape from the band-width limitation between processor and memory (the von Neumann bottleneck). For sensor preprocess-ing, it is natural to adopt a hierarchical design, which includes a central processing unit and low-level preprocessors. One of the possible problems is that hardware preprocessors are less elastic than software in …